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  to learn more about on semiconductor, please visit our website at www.onsemi.com please note: as part of the fairchild semiconductor integration, some of the fairchild orderable part numbers will need to change in order to meet on semiconductors system requirements. since the on semiconductor product management systems do not have the ability to manage part nomenclature that utilizes an underscore (_), the underscore (_) in the fairchild part numbers will be changed to a dash (-). this document may contain device numbers with an underscore (_). please check the on semiconductor website to verify the updated device numbers. the most current and up-to-date ordering information can be found at www.onsemi.com . please email any questions regarding the system integration to fairchild_questions@onsemi.com . is now part of on semiconductor and the on semiconductor logo are trademarks of semico nductor components industries, llc dba on semiconductor or its subsid iaries in the united states and/or other countries. on semiconductor ow ns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellec tual property. a listing of on semiconductor?s product/patent cover age may be accessed at www.onsemi.com/site/pdf/patent-marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semicon ductor makes no warranty, representation or guarantee regarding the s uitability of its products for any particular purpose, nor does on semico nductor assume any liability arising out of the application or use of any product or circuit, and speci?ca lly disclaims any and all liability, including without limitation spe cial, consequential or incidental damages. buyer is responsible for i ts products and applications using on semiconductor products, including compliance with all laws, regul ations and safety requirements or standards, regardless of any suppor t or applications information provided by on semiconductor. ?typica l? parameters which may be provided in on semiconductor data sheets and/or speci?cations can and do vary in diffe rent applications and actual performance may vary over time. all operat ing parameters, including ?typicals? must be validated for each custo mer application by customer?s technical experts. on semiconductor does not convey any license und er its patent rights nor the rights of others. on semiconductor products a re not designed, intended, or authorized for use as a critical compone nt in life support systems or any fda class 3 medical devices or medical devices with a same or similar classi?ca tion in a foreign jurisdiction or any devices intended for implantation i n the human body. should buyer purchase or use on semiconductor products fo r any such unintended or unauthorized application, buyer shall indemnify and hold on semico nductor and its of?cers, employees, subsidiaries, af?liates, and di stributors harmless against all claims, costs, damages, and expense s, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associa ted with such unintended or unauthorized use, even if such claim alleges th at on semiconductor was negligent regarding the design or manufacture o f the part. on semiconductor is an equal opportunity/af?rmative action employer. this literatu re is subject to all applicable copyright laws and is not for resale in any manne r.
tm 74vhc112 dual j-k flip-flops with preset and clear may 2007 ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 74vhc112dual j-k flip-flops with preset and clear features high speed: f max = 200mhz (typ.) at v cc = 5.0v low power dissipation: i cc = 2? (max.) at t a = 25? high noise immunity: v nih = v nil = 28% v cc (min.) power down protection is provided on all inputs pin and function compatible with 74hc112 general description the vhc112 is an advanced high speed cmos devicefabricated with silicon gate cmos technology. it achieves the high-speed operation similar to equivalent bipolar schottky ttl while maintaining the cmos low power dissipation. the vhc112 contains two independent, high-speed jk flip-flops with direct set and clear inputs. synchronous state changes are initiated by the falling edge of the clock. triggering occurs at a voltage level of the clock and is not directly related to transition time. the j and k inputs can change when the clock is in either state with- out affecting the flip-flop, provided that they are in the desired state during the recommended setup and hold times relative to the falling edge of the clock. the low signal on pr or clr prevents clocking and forces q and q high, respectively. simultaneous low signals on pr and clr force both q and q high. an input protection circuit ensures that 0v to 7v can beapplied to the input pins without regard to the supply voltage. this device can be used to interface 5v to 3v systems and two supply systems such as battery backup. this circuit prevents device destruction due to mismatched supply and input voltages. ordering information surface mount packages are also available on tape and reel. specify by appending the suffix letter ??to the ordering number. order number package number package description 74vhc112m m16a 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow 74vhc112sj m16d 16-lead small outline package (sop), eiaj type ii, 5.3mm wide 74VHC112MTC mtc16 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 2 connection diagrampin description truth table h (h) = high voltage level l (l) = low voltage level x = immaterial = high-to-low clock transition q 0 (q 0 ) = before high-to-low transition of clock lower case letters indicate the state of the referenced input or output one setup time prior to the high-to-low clock transition. logic diagram (one half shown) pin names description j 1 , j 2 , k 1 , k 2 data inputs clk 1 , clk 2 clock pulse inputs (active falling edge) clr 1 , clr 2 direct clear inputs (active low) pr 1 , pr 2 direct preset inputs (active low) q 1 , q 2 , q 1 , q 2 outputs inputs outputs pr clr cp jk q q lhxxxhl hlxxxlh llxxxhh hh hhq 0 q 0 hh lhlh hh hlhl hh llq 0 q 0
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 3 absolute maximum ratings stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. recommended operating conditions (1) the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. note: 1. unused inputs must be held high or low. they may not float. symbol parameter rating v cc supply voltage ?.5v to +7.0v v in dc input voltage ?.5v to +7.0v v out dc output voltage ?.5v to v cc + 0.5v i ik input diode current ?0ma i ok output diode current ?0ma i out dc output current ?5ma i cc dc v cc / gnd current ?0ma t stg storage temperature ?5? to +150? t l lead temperature (soldering, 10 seconds) 260? symbol parameter rating v cc supply voltage 2.0v to +5.5v v in input voltage 0v to +5.5v v out output voltage 0v to v cc t opr operating temperature ?0? to +85? t r , t f input rise and fall time, v cc = 3.3v ?0.3v v cc = 5.0v ?0.5v 0ns/v 100ns/v 0ns/v 20ns/v
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 4 dc electrical characteristics symbol parameter v cc (v) conditions t a = 25? t a = ?0? to +85? units min. typ. max. min. max. v ih high level input voltage 2.0 1.50 1.50 v 3.0?.5 0.7 x v cc 0.7 x v cc v il low level input voltage 2.0 0.50 0.50 v 3.0?.5 0.3 x v cc 0.3 x v cc v oh high level output voltage 2.0 v in = v ih or v il i oh = ?0? 1.9 2.0 1.9 v 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 i oh = ?ma 2.58 2.48 4.5 i oh = ?ma 3.94 3.80 v ol low level output voltage 2.0 v in = v ih or v il i ol = 50? 0.0 0.1 0.1 v 3.0 0.0 0.1 0.1 4.5 0.0 0.1 0.1 3.0 i ol = 4ma 0.36 0.44 4.5 i ol = 8ma 0.36 0.44 i in input leakage current 0?.5 v in = 5.5v or gnd ?.1 ?.0 ? i cc quiescent supply current 5.5 v in = v cc or gnd 2.0 20.0 ?
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 5 ac electrical characteristics note: 2. c pd is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. average operating current can be obtained from the equation: i cc (opr.) = c pd ?v cc ?f in + i cc / 4 (per f/f), and the total c pd when n pcs of the flip-flop operate can be calculated by the following equation: c pd (total) = 30 + 14 ?n ac operating requirements note: 3. v cc is 3.3 ?0.3v or 5.0 ?0.5v. symbol parameter v cc (v) conditions t a = 25? t a = ?0? to +85? units min. typ. max. min. max. f max maximum clock frequency 3.3 ?0.3 c l = 15pf 110 150 100 mhz c l = 50pf 90 120 80 5.0 ?0.5 c l = 15pf 150 200 135 mhz c l = 50pf 120 185 110 t plh , t phl propagation delay time (cp to q n or q n ) 3.3 ?0.3 c l = 15pf 8.5 11.0 1.0 13.4 ns c l = 50pf 10.0 15.0 1.0 16.5 5.0 ?0.5 c l = 15pf 5.1 7.3 1.0 8.8 ns c l = 50pf 6.3 10.5 1.0 12.0 t plh , t phl propagation delay time (pr or clr to q n or q n ) 3.3 ?0.3 c l = 15pf 6.7 10.2 1.0 11.7 ns c l = 50pf 9.7 13.5 1.0 15.0 5.0 ?0.5 c l = 15pf 4.6 6.7 1.0 8.0 ns c l = 50pf 6.4 9.5 1.0 11.0 c in input capacitance v cc = open 4 10 10 pf c pd pow er dissipation capacitance (2) 18 pf symbol parameter v cc (v) (3) t a = 25? t a = ?0? to +85? units typ. guaranteed minimum t w minimum pulse width (cp or clr or pr) 3.3 5.0 5.0 ns 5.0 5.0 5.0 t s minimum setup time (j n or k n to cp n ) 3.3 5.0 5.0 ns 5.0 4.0 4.0 t h minimum hold time (j n or k n to cp n ) 3.3 1.0 1.0 ns 5.0 1.0 1.0 t rec minimum recovery time (clr or pr to cp) 3.3 6.0 6.0 ns 5.0 5.0 5.0
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 6 physical dimensions dimensions are in millimeters unless otherwise noted. figure 1. 16-lead small outline integrated circuit (soic), jedec ms-012, 0.150" narrow pa ck ag e number m16a
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 7 physical dimensions (continued) dimensions are in millimeters unless otherwise noted. figure 2. 16-lead small outline package (sop), eiaj type ii, 5.3mm wide pa ck ag e number m16d
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 8 physical dimensions (continued) dimensions are in millimeters unless otherwise noted. figure 3. 16-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pa ck ag e number mtc16 0.65 4.40.1 mtc16rev4 0.11 4.55 5.00 5.000.10 12 7.35 4.45 1.45 5.90
74vhc112 dual j-k flip-flops with preset and clear ?995 fairchild semiconductor corporation www.fairchildsemi.com 74vhc112 rev. 1.2 9 trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. acex across the board. around the world. activearray bottomless build it now coolfet crossvolt ctl current transfer logic dome e 2 cmos ecospark ensigna fact quiet series fact fast fastrfps frfet globaloptoisolator gto hisec i-lo implieddisconnect intellimax isoplanar microcoupler micropak microwire motion-spm msx msxpro ocx ocxpro optologic optoplanar pacmanpdp-spm pop power220 power247 poweredge powersaver power-spm powertrench programmable active droop qfet qs qt optoelectronics quiet series rapidconfigure rapidconnect scalarpump smart start spm stealthsuperfet supersot-3 supersot-6 supersot-8 syncfet tcm the power franchise tinyboost tinybuck tinylogic tinyopto tinypower tinywire trutranslation serdes uhc unifetvcx wire disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild? worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems wh ich, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform w hen properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information formative or in design this datasheet contains the design specifications for product development. specifications may change in any manner without notice. preliminary this datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identification needed full production first production this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. rev. i26
www. onsemi.com 1 on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductors product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does on semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. typical parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including typic als must be validated for each customer application by customers technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distrib utors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 www.onsemi.com literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your localsales representative ? semiconductor components industries, llc


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